Tier Logic Early Access Program Overview

For a limited time under the Tier Logic Early Access Program (EAP), production orders of $50k for converting an existing production FPGA to a compatible TierASIC™ device will qualify for free NRE and conversion. For production commitments of $100k or more, we will also provide free pin-compatible package development.

How the Tier Logic Early Access Program Works

• The order must be for conversion of an existing FPGA design in production to a compatible TierASIC device
• Tier Logic takes Verilog and VHDL designs, converts and implements the design in a TierASIC device, and delivers samples
• As an option, the TierASIC solution can also be made pin-compatible

Requirements

This offer is only available to registered Tier Logic users. Other restrictions apply. For access to Early Access Program details and the full Tier Logic website, please register here.