Launch info:

Tier Logic 3D Technology Brief

Tier Logic 3D Technology Launch White Paper

World's First SRAM Over CMOS

3D TierFPGA and TierASIC devices

Cross Sections of 3D TierFPGA and TierASIC Devices

3D TierFPGA development board

Tier Logic FPGA and ASIC Products

The TierONE™ family of devices is designed to deliver logic-rich, low-cost FPGAs (TierFPGA™ products) with the flexibility to migrate to an ASIC (TierASIC™ products) using the Design Once™ concept and Timing-Exact™ closure. The Timing-Exact feature guarantees that the design’s operational timing characteristics are exactly the same in the TierFPGA and in the TierASIC devices. The Design Once methodology allows easy click-of-a-button migration from TierFPGAs to TierASICs without any additional engineering effort.

The TierONE programmable fabric was designed for greater logic efficiency, higher performance, and lower cost. Furthermore, dedicated high-speed functions such as RAMs, phase-locked loops (PLLs), multipliers, and IO blocks deliver the same features and performance available in mainstream FPGAs.